Xilinx® UltraScale™ architecture comprises high-performance FPGA, MPSoC, and RFSoC families that address a vast spectrum ofsystem requirements with a focus on lowering total power consumption through numerous innovative technologicaladvancements.RF Data Converter Subsystem OverviewMost Zynq UltraScale+ RFSoCs include an RF data converter subsystem, which contains multiple radiofrequency analog to digital converters (RF-ADCs) and multiple radio frequency digital to analogconverters (RF-DACs). The high-precision, high-speed, power efficient RF-ADCs and RF-DACs can beindividually configured for real data or in most cases can be configured in pairs for real and imaginary I/Qdata. See RF-ADCs and RF-DACs sections.Soft Decision Forward Error Correction (SD-FEC) OverviewSome Zynq UltraScale+ RFSoCs include highly flexible soft decision FEC blocks for decoding and encodingdata as a means to control errors in data transmission over unreliable or noisy communication channels.The SD-FEC blocks support low-density parity check (LDPC) decode/encode and Turbo decode for use in5G wireless, backhaul, DOCSIS, and LTE applications.Processing System OverviewZynq UltraScale+ MPSoCs and RFSoCs feature dual and quad core variants of the Arm Cortex-A53 (APU)with dual-core Arm Cortex-R5F (RPU) processing system (PS). Some devices also include a dedicated ArmMali™-400 MP2 graphics processing unit (GPU)